UPD75206CW NEC [NEC], UPD75206CW Datasheet - Page 15

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UPD75206CW

Manufacturer Part Number
UPD75206CW
Description
4-BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet

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5.2
system clock control register (SCC).
* Instruction execution
Remarks
The operation of the clock generator circuit is determined by the processor clock control register (PPC) and
This circuit can generate two types of clocks: main system clock and subsystem clock.
In addition, it can also change the instruction execution time.
CLOCK GENERATOR CIRCUIT
HALT*
STOP*
4
1.
2.
3.
4.
5.
6.
7.
0.95 s, 1.91 s, 15.3 s (main system clock: 4.19 MHz)
122 s (subsystem clock: 32.768 kHz)
f
f
f
PCC: Processor clock control register
SCC: System clock control register
1 clock cycle (t
ELECTRICAL SPECIFICATIONS.
X
XT
XX
PCC2 and
PCC3
Clear
SCC3
SCC0
PCC0
PCC1
PCC2
PCC3
SCC
PCC
= CPU clock
= Main system clock frequency
= Subsystem clock frequency
= System clock frequency
XT1
XT2
X2
X1
Main System
Subsystem
Generator
Generator
Clock
Clock
CY
) of
Oscillation
Stop
STOP F/F
Q
Fig. 5-1 Clock Generator Block Diagram
is 1 machine cycle of an instruction. For t
f
f
X
XT
R
S
Watch Timer
Timer/Pulse
Generator
f
XX
1/2 1/6
Frequency Divider
1/8~1/4096
HALT F/F
S
R
Q
CY
, see ”AC Characteristics“ in 12.
• FIP Controller
• Basic Interval Timer (BT)
• Timer/Event Counter
• Serial Interface
• Watch Timer
• INT0 Noise Eliminator
Wait Release Signal from BT
RES Signal (Internal Reset)
Standby Release Signal from
Interrupt Control Circuit
• CPU
• INT0 Noise Eliminator
• INT1 Noise Eliminator
Frequency
Divider
1/4
PD75206
15

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