UPD75206CW NEC [NEC], UPD75206CW Datasheet - Page 25

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UPD75206CW

Manufacturer Part Number
UPD75206CW
Description
4-BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet

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7. STANDBY FUNCTIONS
tion in the program standby mode.
8. RESET FUNCTIONS
voltage. This pulse is used in the three ways according to SWA, SWB mask option specification shown in Fig. 8-
1. (Refer to 10. MASK OPTION SELECTION.)
Set instruction
System clock when set
Release signal
Two standby modes (STOP mode and HALT mode) are available for the PD75206 to decrease power consump-
The reset signal (RES) generator has a configuration shown in Fig.8-1.
The power-on reset generator is a circuit to generate a one-shot pulse upon detection of the start-up of the power
Clock oscillator
Basic interval timer
Serial interface
Timer/event counter
Timer/pulse generator
Watch timer
FIP controller/driver
CPU
RESET
Power-On
Reset
Generator
Table 7-1 Operation Status in Standby Mode
STOP instruction
Setting enabled only with main system
clock.
Oscillator stops only with main system
clock.
Operation stopped.
Operation enabled only when external
SCK input is selected for serial clock.
Operation enabled only when TI0 pin
input is specified for count clock.
Operation stopped.
Operation enabled only f
count clock.
Interrupt request signal (except INT0, INT1, INT2) or RESET input enabled by
interrupt enable flag.
Operation disabled (display off mode set before disabling).
Operation stopped.
Fig. 8-1 Reset Signal Generator
Mask
Option
SWA
STOP Mode
SWB
XT
is selected for
Power-On Flag
(PONF)
HALT instruction
Setting enabled with either main system
clock or subsystem clock.
Stops only with CPU clock
continued).
Operation (IRQBT set at reference time
intervals).
Operation enabled when serial clock other
than
Operation enabled.
Operation enabled.
Operation enabled.
is specified.
Bit
Manipulation
Instruction
Execution
Internal Reset Signal
(RES)
HALT Mode
(Oscillation
PD75206
25

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