UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 106

• Manufacturer Part Number: UPD75238GJ
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC [NEC]

106
(6) Transfer start in each mode
In each of the three-wire serial I/O, two-wire serial I/O, and SBI modes, serial transfer is started by writing
transfer data in shift register 0 (SIO0).
However, the following two conditions must be satisfied:
• The serial interface operation enable/disable bit (CSIE0) is set to 1.
• The internal serial clock is not operating after 8-bit serial transfer, or SCK0 is high.
When eight bits have been transferred, serial transfer automatically terminates setting the interrupt
request flag (IRQCSI0).
[In the two-wire serial I/O mode]
Cautions 1. The N-ch transistor needs to be turned off when data is received. So FFH must be written
Example When RAM data specified by the HL register is transferred to SIO0, SIO0 data is loaded into the
Caution
Caution
[In the SBI mode]
2. If data is written to SIO0 when the slave is busy, the data is not lost.
Transfer operation cannot be started by setting CSIE0 to 1 after writing data to the shift register
0.
The N-ch transistor needs to be turned off when data is received. So FFH must be written to
SIO0 beforehand.
accumulator at the same time, and serial transfer is started.
MOV
SEL
XCH
to SIO0 beforehand.
However, when the wake-up function specification bit (WUP) is set to 1, the N-ch transistor
is always off. So FFH need not be written to SIO0 beforehand for reception.
Transfer operation is started when the busy state is released and input to SB0 (or SB1) goes
high.
XA, @HL
MB15
XA, SIO0
; Extracts send data from RAM
; Or CLR1 MBE
; Exchanges send data with receive data and starts transfer
PD75238