UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 116

• Manufacturer Part Number: UPD75238GJ
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC [NEC]

116
(4) SA register (SA)
(5) A/D converter operation
Setting values of SCC, PCC
SCC3
The SA register (successive approximation register) is an 8-bit register to hold the result of A/D conversion
in successive approximation.
SA is read with an 8-bit manipulation instruction. No data can be written to SA by software.
A RESET input sets SA to 7FH.
Analog input signals subject to A/D conversion are specified by setting bits 6, 5, and 4 in the A/D conversion
mode register (ADM6, ADM5, and ADM4).
A/D conversion is started by setting bit 3 (SOC) of ADM to 1. After that, SOC is automatically cleared to
0. A/D conversion is performed by hardware using the successive-approximation method. The resultant
8-bit data is loaded into the SA register. Upon completion of A/D conversion, bit 2 (EOC) of ADM is set
to 1.
Fig. 4-64 shows the timing chart of A/D conversion.
The A/D converter is used as follows:
1
2
3
4
Cautions 1. 1 and 2 above can be performed at the same time.
0
0
1
Note 40.1 s at 4.19 MHz
Remark
Select analog input channels (by setting ADM6, ADM5 and ADM4).
Direct the start of A/D conversion (by setting SOC)3
Wait for the completion of A4D conversion (wait for EOC to be set or wait using a software timer).
Read the result of A/D conversion (read the SA register).
SCC0
0
1
2. There is a delay of up to 2
: Don’t care
PCC1
the clearing of EOC after A/D conversion is started. EOC must be tested when a time
indicated in Table 4-7 has elapsed after the setting of SOC. Table 4-7 also indicates A/D
conversion times.
Note 3.81 s at 4.19 MHz
0
1
1
PCC0
0
0
1
168/f
(28.0 s at 6.0 MHz)
Conversion stopped
A/D conversion time
X
Table 4-7 Setting of SCC and PCC
4
/f
X
Note
seconds (2.67 s at 6.0 MHz)
Waiting not required
2 machine cycles
4 machine cycles
Waiting not required
Wait time from SOC setting
to EOC test
—
Note
from the setting of SOC to
Wait time from SOC setting
to A/D conversion comple-
tion
3 machine cycles
21 machine cycles
42 machine cycles
Waiting not required
—
PD75238