UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 119

• Manufacturer Part Number: UPD75238GJ
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC [NEC]

4.11 BIT SEQUENTIAL BUFFER: 16 BITS
specifications. So the buffer is particularly useful in processing long data bit by bit.
and also allows indirect bit specification using the L register.
decrementing the L register in a program loop, the bit to be manipulated can be sequentially shifted for
continued processing.
continuous 1-bit data input or output operations by combining direct 1-bit, 4-bit, and 8-bit addressing with
pmem.@L addressing. In 8-bit manipulation, the higher eight bits or lower eight bits can be manipulated by
specifying BSB0 or BSB2.
4.12 FIP CONTROLLER/DRIVER
(1) Configuration of the FIP controller/driver
The bit sequential buffer (BSB0 to BSB3) is special data memory for bit manipulations.
The buffer allows bit manipulations to be performed very easily by sequentially changing address and bit
This data memory consists of 16 bits, and allows pmem.@L addressing with a bit manipulation instruction
Remark In pmem.@L addressing, bit specification is shifted according to the L register. With pmem.@L
Data can also be manipulated using direct addressing. The buffer can be used for applications such as
The PD75238 contains a display controller that reads the contents of display data memory by DMA
operation and generates digit and segment signals automatically. It also contains a high-voltage output
buffer that can directly drive a fluorescent indicator lamp (FIP). Fig. 4-68 shows the configuration of the
FIP controller/driver.
Caution The FIP controller/driver can operate only when the high-speed or medium-speed (PCC = 0011B
Address
Bit
Symbol
L register
addressing, bit sequential buffer can be manipulated at any time regardless of MBE/MBS
specification.
or 0010B) is set for the main system clock (SCC.0 = 0). With the other clocks or in the standby
mode, the FIP controller/driver may malfunction. Disable FIP controller operation (DSPM.3 =
0) before entering into the standby mode.
L = F
3
2
BSB3
FC3H
Fig. 4-67 Format of the Bit Sequential Buffer
1
L = C L = B
0
3
INCS L
2
FC2H
BSB2
1
L = 8 L = 7
0
3
FC1H
2
BSB1
DECS L
In this case, only by incrementing or
1
L = 4 L = 3
0
3
2
FC0H
BSB0
1
L = 0
PD75238
0
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