UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 125
UPD75238GJ
Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.UPD75238GJ.pdf
(190 pages)
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(7) Static mode registers
Address
FD6H
A static mode registers are registers used to specify static output/dynamic output of the segment output
pins.
There are two static mode registers: static mode register A and static mode register B. Fig. 4-73 and Fig.
4-74 show their formats.
These registers are set with an 8-bit manipulation instruction. A RESET input clears all bits to 0.
(a) Static mode register A (STATA)
Static mode register A (STATA) is a register to specify static output/dynamic output of the S0/P120
to S15/P153/T10/PH3 pins.
Caution Part of the S0 to S15 pins cannot be set as dynamic outputs while the other pins are set
7
0
as static outputs.
6
0
5
0
Fig. 4-73 Static Mode Register A (STATA)
S0 to S15 pins Static output/dynamic output selection bit
STATA3 STATA2
4
0
0
1
STATA3
3
0
1
STATA2 STATA1 STATA0
STATA1
2
0
1
STATA0
1
0
1
S0 to S15 become dynamic outputs. The
number of segments and the number of digits
are set by DSPM and DIGS.
S0 to S15 become static outputs. Static data is
output by issuing an output instruction for ports
12 to 15. The outputs are independent of the
value of DSPM.3.
0
Output status of S0 to S15 pins
Symbol
STATA
PD75238
125
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