UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 144
UPD75238GJ
Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.UPD75238GJ.pdf
(190 pages)
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144
6.2 RELEASE OF THE STANDBY MODES
signal
released.
(a) Release of the STOP mode by RESET input
(b) Release of the STOP mode by the occurrence of an interrupt
(c) Release of the HALT mode by RESET input
Note 31.3 ms at 4.19 MHz.
The STOP mode and HALT mode are released by a RESET input or the generation of an interrupt request
Note INT0 to INT2 are excluded.
Remark The dashed line indicates the case where the interrupt request that releases the standby
Note
that is enabled with the interrupt enable flag. Fig. 6-1 shows how the STOP and HALT modes are
Standby
release
signal
RESET
signal
RESET
signal
Clock
Clock
Clock
mode is accepted (IME = 1).
Oscillation
Operating
mode
Oscillation
Operating
mode
Operating
mode
STOP instruction
STOP instruction
HALT instruction
Fig. 6-1 Standby Mode Release Operation
No oscillation
No oscillation
STOP mode
STOP mode
HALT mode
Oscillation
Wait
(Time set by BTM)
HALT mode
HALT mode
Oscillation
Oscillation
Wait
approximately
21.8 ms/6.0 MHz
Wait
approximately
21.8 ms/6.0 MHz
Note
Note
Operating
mode
Operating
mode
Operating
mode
PD75238
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