UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 37

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UPD75238GJ

Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
(3) Interrupt status flag (IST1, IST0)
The interrupt status flag is a 2-bit flag used to store the status of processing being performed. (For detailed
information, see Table 5-3.)
The interrupt priority control circuit (see Fig. 5-1) checks this flag to control multiple interrupts.
The contents of the IST1 and IST0 are saved as part of the PSW to stack memory if an interrupt is accepted,
then are automatically set to a one-step higher status. The RETI instruction restores the contents present
before an interrupt occurs.
The interrupt status flag can be manipulated using a memory manipulation instruction, and the status of
processing being performed can be changed by program control.
Caution The user must always disable interrupts with the DI instruction before manipulating this flag,
IST1
0
0
1
1
and must enable interrupts with the EI instruction after manipulating this flag.
IST0
0
1
0
1
Table 3-4 Information Indicated by the Interrupt Status Flag
Status of processing
being performed
Status 0
Status 1
Status 2
Normal program processing is being performed.
Any interrupts are acceptable.
A lower- or higher-priority interrupt is being serviced.
Higher-priority interrupts are acceptable.
A higher-priority interrupt is being serviced.
No interrupts are acceptable.
Not to be set
Processing and interrupt control
PD75238
37

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