UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 51
UPD75238GJ
Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
1.UPD75238GJ.pdf
(190 pages)
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PD75238
(3) Processor clock control register (PCC)
The PCC is a 4-bit register for selecting CPU clock
with the low-order two bits and for selecting a CPU
operation mode with the high-order two bits. (See Fig. 4-15.)
When bit 3 or bit 2 is set to 1, the standby mode is set. When this is released by the standby release signal,
these bits are automatically cleared to return to the normal operation mode. (See Chapter 6 for detailed
information.)
A 4-bit memory manipulation instruction is used to set the low-order two bits of the PCC. (The high-order
two bits are set to 0.)
Bit 3 and bit 2 are set to 1 using the STOP instruction and HALT instruction, respectively.
The STOP instruction and HALT instruction can be executed regardless of MBE setting.
A CPU clock can be selected only when the main system clock is used for operation. When the subsystem
clock is selected for operation, the low-order two bits of the PCC are invalidated, and f
/4 is automatically
XT
set. The STOP instruction can be executed only when the main system clock is used for operation.
The generation of a RESET signal clears the PCC to 0.
51
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