UPD75238GJ NEC [NEC], UPD75238GJ Datasheet - Page 62

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UPD75238GJ

Manufacturer Part Number
UPD75238GJ
Description
4 BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC [NEC]
Datasheet
Address
F85H
62
(3) Basic interval timer mode register (BTM)
BTM is a 4-bit register that controls operation of the basic interval timer.
The BTM contents are set by using a 4-bit memory manipulation instruction.
Bit 3 can be independently set using a bit manipulation instruction.
When bit 3 is set to 1, the contents of the basic interval timer are cleared, and the basic interval timer
interrupt request flag (IRQBT) is also cleared (to start the basic interval timer).
A RESET input clears the contents to 0, and the longest interrupt request signal generation interval time
is set.
BTM3
3
BTM2
2
Fig. 4-24 Format of the Basic Interval Timer Mode Register
BTM1
1
BTM0
0
(Frequency when f
(Frequency when f
Basic interval timer start control bit
Other setting
Other setting
When “1” is written to this bit, the basic interval timer operation starts (the counter
and the interrupt request flag are cleared).
When the operation starts, this bit is automatically reset to 0.
0
0
1
1
0
0
1
1
Symbol
BTM
0
1
0
1
0
1
0
1
0
1
1
1
0
1
1
1
f
f
f
f
Not to be set
f
f
f
f
Not to be set
X
X
X
X
X
X
X
X
X
X
/2
/2
/2
/2
/2
/2
/2
/2
Input clock specification
Input clock specification
= 4.19 MHz)
= 6.0 MHz)
12
9
5
12
9
5
7
7
(11.7 kHz)
(46.9 kHz)
(188 kHz)
(8.18 kHz)
(32.768 kHz)
(131 kHz)
(1.46 kHz)
(1.02 kHz)
(wait time for releasing standby)
(wait time for releasing standby)
2
2
2
2
2
2
2
2
20
17
15
13
20
17
15
13
/f
/f
/f
/f
/f
/f
/f
/f
Interrupt interval time
Interrupt interval time
X
X
X
X
X
X
X
X
(175 ms)
(21.8 ms)
(5.46 ms)
(1.37 ms)
(250 ms)
(31.3 ms)
(7.82 ms)
(1.95 ms)
PD75238

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