PLL130-05 PhaseLink (PLL), PLL130-05 Datasheet - Page 3
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PLL130-05
Manufacturer Part Number
PLL130-05
Description
Output Level Converter Buffer , 1 PaIR Out, Translator to Pecl, < 800MHz (Inv. OE)
Manufacturer
PhaseLink (PLL)
Datasheet
1.PLL130-05.pdf
(5 pages)
3. PECL Electrical Characteristics
4. PECL Switching Characteristics
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Output High Voltage
Output Low Voltage
Clock Rise Time
Clock Fall Time
PARAMETERS
PARAMETERS
OUT
OUT
PECL Levels Test Circuit
OUT
80%
50%
20%
OUT
50
50
SYMBOL
High Speed Translator Buffer to PECL (Enable Low)
SYMBOL
t
R
V
V
OH
OL
t
t
r
f
2.0V
VDD
PECL Transistion Time Waveform
45 - 55%
@20/80% - PECL
@80/20% - PECL
R
L
= 50
CONDITIONS
(see figure)
CONDITIONS
DUTY CYCLE
to (V
t
F
OUT
OUT
50%
DD
– 2V)
PECL Output Skew
55 - 45%
t
SKEW
V
DD
MIN.
MIN.
Preliminary
– 1.025
TYP.
0.6
0.5
PLL130-05
V
DD
MAX.
– 1.620
MAX.
Rev 11/06/02 Page 3
1.5
1.5
UNITS
UNITS
ns
ns
V
V