PLL202-03 PhaseLink (PLL), PLL202-03 Datasheet - Page 11
![no-image](/images/no-image-200.jpg)
PLL202-03
Manufacturer Part Number
PLL202-03
Description
Ali, Via, Sis, Intel 440BX Chipset FTGS , Freq. Progr., SST
Manufacturer
PhaseLink (PLL)
Datasheet
1.PLL202-03.pdf
(13 pages)
2. Output Buffer Electrical Specifications
Unless otherwise stated, all power supplies = 3.3V 5%, and ambient temperature range T
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Output Rise time
Output Fall time
Duty Cycle
Clock Skew
Output
Impedance
PARAMETERS
Motherboard Clock Generator for SIS540/630 with 133MHz FSB
SYMBOL
T
T
T
SKEW
D
Z
OR
OF
T
0
CPU
REF0, REF1
SDRAM, PCI
24_48MHz
CPU
REF0, REF1
SDRAM, PCI
24_48MHz
CPU, 24_48MHz,
48MHz, REF, PCI,
SDRAM
CPU to CPU
SDRAM to SDRAM
PCI to PCI
CPU to SDRAM
SDRAM to SDRAM
CPU to PCI
CPU
REF0, PCI, 48Mhz,
24_48Mhz
SDRAM
REF1
OUTPUTS
Measured @ 0.4V ~ 2.4V,
C
Measured @ 0.4V ~ 2.4V,
C
Measured @ 0.4V ~ 2.4V,
C
Measured @ 0.4V ~ 2.4V,
C
Measured @ 2.4V ~ 0.4V,
C
Measured @ 2.4V ~ 0.4V,
C
Measured @ 2.4V ~ 0.4V,
C
Measured @ 2.4V ~ 0.4V,
C
Measured @ 1.5V
C
Measured @ 1.5V,
equal loads
V
V
DD
DD
L
L
L
L
L
L
L
L
L
=10-20pf, 3.3V 5%
=10-20pf
=10-30pf
=10-30pf, 3.3V 5%
=10-20pf, 3.3V 5%
=10-20pf
=10-30pf
=10-30pf, 3.3V 5%
=20pf, V
=3.3V(2.5V) 5%
=3.3V 5%
CONDITIONS
DD
A
=2.5V
= 0 C to 70 C
MIN.
45
1
1
1
1
1
1
1
PLL202-03
TYP.
30
25
20
20
Rev 02/15/00 Page 11
MAX.
250
250
250
500
250
55
4
4
4
4
4
4
4
UNITS
Ohm
V/ns
V/ns
ps
ns
%