PLL202-03 PhaseLink (PLL), PLL202-03 Datasheet - Page 7
![no-image](/images/no-image-200.jpg)
PLL202-03
Manufacturer Part Number
PLL202-03
Description
Ali, Via, Sis, Intel 440BX Chipset FTGS , Freq. Progr., SST
Manufacturer
PhaseLink (PLL)
Datasheet
1.PLL202-03.pdf
(13 pages)
5. BYTE 4: Reserved Clock Register (1=Enable, 0=Disable)
6. BYTE 5: Peripheral Clock Register (1=Enable, 0=Disable)
7. BYTE 6: Revision ID and Vendor ID Register (1=Enable, 0=Disable)
Note: *: Default value at power-up
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
Bit
Bit
Motherboard Clock Generator for SIS540/630 with 133MHz FSB
Pin#
Pin#
Pin#
25
26
41
40
38
37
35
34
48
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Default
Default
Default
X
X
X
X
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
Description
24_48MHz (Active/Inactive)
48MHz (Active/Inactive)
SDRAM13 (Active/Inactive)
SDRAM12 (Active/Inactive)
SDRAM11 (Active/Inactive)
SDRAM10 (Active/Inactive)
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
Description
Reserved
Reserved
Inverted power up latched FS3 value (Read-back only)
Inverted power up latched FS2 value (Read-back only)
Inverted power up latched FS1 value (Read-back only)
Inverted power up latched FS0 value (Read-back only)
REF1 ( Active/Inactive )
REF0 ( Active/Inactive )
Description
Revision ID Bit 3*
Revision ID Bit 2*
Revision ID Bit 1*
Revision ID Bit 0*
Vendor ID Bit 3*
Vendor ID Bit 2*
Vendor ID Bit 1*
Vendor ID Bit 0*
PLL202-03
Rev 02/15/00 Page 7