PLL202-108 PhaseLink (PLL), PLL202-108 Datasheet - Page 13

• Manufacturer Part Number: PLL202-108
• Description: Ali, Via, Sis, Intel 440BX Chipset FTGS , I2C Programmable: Skew / SST / Frequency / Drive
• Manufacturer: PhaseLink (PLL)

17. Byte 16: Buffer Drive Strength Control Register
18. Byte 17: Buffer Drive Strength Control Register
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Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
Bit
Strength
Strength
Strength
Strength
PCI[5:8]
PCI[0:4]
PCIF,
USB
REF
Name
Name
-
-
-
-
Programmable Clock Generator for ALI 1681 P4 Chip Sets
Bit <2>
Bit <1>
Bit <0>
Bit <2>
Bit <1>
Bit <0>
Bit <2>
Bit <1>
Bit <0>
Bit <2>
Bit <1>
Bit <0>
Default
Default
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
Reserved.
Reserved.
These three bits will program drive strength for 48MHz and
24_48MHz output clocks (see Table 2).
These three bits will program drive strength for PCIF and PCI[5:8]
output clocks (see Table 2).
Reserved.
Reserved.
These three bits will program drive strength for PCI[0:4] output
clocks (see Table 2).
These three bits will program drive strength for REF[0:1] output
clocks (see Table 2).
Description
Description
PLL202-108
Rev 8/20/02 Page 13