PLL202-108 PhaseLink (PLL), PLL202-108 Datasheet - Page 20
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PLL202-108
Manufacturer Part Number
PLL202-108
Description
Ali, Via, Sis, Intel 440BX Chipset FTGS , I2C Programmable: Skew / SST / Frequency / Drive
Manufacturer
PhaseLink (PLL)
Datasheet
1.PLL202-108.pdf
(21 pages)
2. DC/AC Electrical Specifications (continued)
Unless otherwise stated, all power supplies = 3.3V±5%, and ambient temperature range T
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Output Rise time
Output Fall time
Duty Cycle
Clock Skew
Jitter(Cycle to Cycle)
Frequency
Stabilization Time
AC output
impedance
PARAMETERS
SYMBOL
J
T
Programmable Clock Generator for ALI 1681 P4 Chip Sets
cyc-cyc
T
T
T
SKEW
D
Z
OR
FST
OF
T
0
CPU
REF, 48MHz,
24MHz
PCIF, PCI, AGP,
APIC
CPU
REF, 48MHz,
24MHz
PCIF, PCI, AGP,
APIC
CPU,APIC,REF,
48MHz,24MHz
PCI, AGP
CPU
PCI
AGP
CPU
REF
PCI, AGP
CPU,PCIF,PCI,
APIC,AGP,REF,
48MHz,24MHz
CPU
PCI,AGP
REF,48MHz,24MHz
OUTPUTS
Measured @ 0.4V ~ 2.0V,
C
Measured @ 0.4V ~ 2.4V,
C
Measured @ 0.4V ~ 2.4V,
C
Measured @ 2.0 ~ 0.4V,
C
Measured @ 2.4V ~ 0.4V,
C
Measured @ 2.4V ~ 0.4V,
C
Measured @ 1.5V
C
Measured @ 1.5V,
C
Rising edge @ 1.25V,
C
Rising edge @ 1.5V,
C
Rising edge @ 1.5V,
C
Measured @ 1.25V
Measured @ 1.5V
Measured @ 1.5V
Assumes full supply
voltage reached within
1ms from power-up. Short
cycle exist prior to
frequency stabilization.
V
V
V
DD
DD
DD
L
L
L
L
L
L
L
L
L
L
L
=10-20pf, 2.5V±5%
=10-20pf
=10-30pf
=10-20pf, 2.5V±5%
=10-20pf
=10-30pf
=20pf
=20~30pf
=20pf
=30pf
=30pf
=3.3V(2.5V)±5%
=3.3V±5%
=3.3V±5%
CONDITIONS
A
= 0°C to 70°C
MIN.
45
40
PLL202-108
TYP.
50
20
30
40
Rev 8/20/02 Page 20
MAX.
175
500
500
250
500
250
1.6
1.6
55
55
4
2
4
2
3
UNITS
ohm
ms
ns
ns
ps
ps
%