PLL202-16 PhaseLink (PLL), PLL202-16 Datasheet - Page 8

• Manufacturer Part Number: PLL202-16
• Description: Ali, Via, Sis, Intel 440BX Chipset FTGS , Freq. Progr., Power Mgt, Wdt, Drive Ctrl, SST
• Manufacturer: PhaseLink (PLL)

47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
41,42
34,35
39,40
41,42
21
19
18
17
15
14
12
11
-
-
-
-
  

      

  
1
1
1
1
1
1
1
1
X
X
X
X
1
1
1
0
Enables/disables CPUT_CS, CPUC_CS. When disabled, defaults to
CPUT_CS = 0 and CPUC_CS = 1
Enables/disables CPUT1, CPUC1. When disabled, defaults to
CPUT1 = 1 and CPUC1 = 0
Enables/disables CPUT0, CPUC0. When disabled, defaults to
CPUT0 = 1 and CPUC0 = 0
Reflects inverted MULT_SEL1 value latched at power-up (Read only)
Reflects inverted FS3 value latched at power-up (Read only)
Reflects inverted FS2 value latched at power-up (Read only)
Reflects inverted FS1 value latched at power-up (Read only)
Reflects inverted FS0 value latched at power-up (Read only)
PCI7 ( Active/Inactive )
PCI6 ( Active/Inactive )
PCI5 ( Active/Inactive )
PCI4 ( Active/Inactive )
PCI3 ( Active/Inactive )
PCI2 ( Active/Inactive )
PCI1 ( Active/Inactive )
PCI0 ( Active/Inactive )


Rev 07/10/01 Page 8