PLL502-13 PhaseLink (PLL), PLL502-13 Datasheet - Page 4
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PLL502-13
Manufacturer Part Number
PLL502-13
Description
, 12-25MHz In, 192-400MHz Out, Pecl
Manufacturer
PhaseLink (PLL)
Datasheet
1.PLL502-13.pdf
(6 pages)
5. Jitter and Phase Noise specification
Note: Phase Noise measured at VIN = 0V
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Period jitter RMS at 311MHz
Accumulated jitter RMS at
311MHz
Integrated jitter RMS at 311MHz
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
192MHz – 400MHz Low Phase Noise PECL VCXO (12 – 25MHz Crystal)
PARAMETERS
With capacitive decoupling
between VDD and GND.
With capacitive decoupling
between VDD and GND. Over
10,000 cycles.
Integrated 12 kHz to 20 MHz
311MHz @10Hz offset
311MHz @100Hz offset
311MHz @1kHz offset
311MHz @10kHz offset
311MHz @100kHz offset
CONDITIONS
MIN.
Preliminary
TYP.
TBM
-111
-115
-110
-60
-90
9
4
PLL502-13
MAX.
Rev 7/15/02 Page 4
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
UNITS
ps
ps
ps