PLL602-04 PhaseLink (PLL), PLL602-04 Datasheet - Page 2
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PLL602-04
Manufacturer Part Number
PLL602-04
Description
, 12 - 25MHz In, 96 - 200MHz Out, CMOS, 3.3V
Manufacturer
PhaseLink (PLL)
Datasheet
1.PLL602-04.pdf
(4 pages)
PIN DESCRIPTIONS
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
2. AC Specification
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Supply Voltage Range
Input Voltage Range
Output Voltage Range
Soldering Temperature
Storage Temperature
Ambient Operating Temperature
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Duty Cycle
Name
XOUT
GND
VDD
CLK
XIN
N/C
OE
PARAMETERS
Number
PARAMETERS
7, 8
1
2
3
4
5
6
Type
O
P
P
I
I
I
-
Low Phase Noise CMOS XO (96MHz to 200MHz)
Output clock pin.
+3.3V VDD power supply pin.
Output enable input pin. Disables (tri-state) output when low. Internal pull-
up enables output by default if pin is not connected to low.
Crystal input pin.
Crystal output pin.
Not connected.
Ground pin.
0.8V to 2.0V with 10pF load
2.0V to 0.8V with 10pF load
At VDD/2
CONDITIONS
SYMBOL
Preliminary for proposal
V
V
T
V
CC
O
S
I
Description
MIN.
12
96
45
MIN.
-
-
-
-65
-10
0.5
0.5
0.5
TYP.
PLL602-04
50
V
V
MAX.
CC
CC
260
150
85
7
+
+
0.5
0.5
Rev 12/04/01 Page 2
MAX.
200
1.5
1.5
25
55
UNITS
UNITS
V
V
V
MHz
MHz
C
C
C
ns
ns
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