PLL701-13 PhaseLink (PLL), PLL701-13 Datasheet

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PLL701-13

Manufacturer Part Number
PLL701-13
Description
, 1x, 2x, or 4x Out, 24 - 120MHz in = Out, SST
Manufacturer
PhaseLink (PLL)
Datasheet
FEATURES
DESCRIPTIONS
The PLL701-13 is a Spread Spectrum Clock
Generator designed for the purpose of reducing EMI
in high-speed digital systems. The selectable Down
Spread modulation amplitude (see table below)
permits EMI reduction without over-clocking the
output. Any output frequency can be selected by
programming 4 multiplier modes. The device operates
over a very wide range of input frequencies and
provides 1x to 4x modulated clock outputs.
OUTPUT CLOCK (FOUT) SELECTION
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
S3
Spread Spectrum Clock Generator with selectable
multiplier from 1x to 4x outputs.
Output frequency ranges: 24MHz to 240MHz.
Selectable Down Spread Modulation.
TTL/CMOS compatible outputs.
3.3V Operating Voltage.
Low short term jitter.
Available in 8-Pin 150mil SOIC.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
S2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FIN Range
60 - 120
60 - 120
60 - 120
60 - 120
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
24 - 60
(MHz)
Low EMI Spread Spectrum Multiplier Clock
FOUT
PIN CONFIGURATION
X1
X1
X1
X1
X2
X2
X2
X2
X2
X2
X4
X4
X1
X1
X1
X1
Note: v: 30k
S2^
S1^
FIN
S0
Internal Pull down ^: 30k
Frequency
v
Fin / 256
Spread Spectrum Modulation
FIN = 24 ~ 120 Mhz
1
2
3
4
PLL701-13
8
7
6
5
Internal Pull up.
Rev 11/07/02 Page 1
VDD
S3
FOUT
GND
v
Magnitude
-1.5%
-2.0%
-2.5%
-3.0%
-0.5%
-1.0%
-1.5%
-2.0%
-2.5%
-3.0%
-0.5%
-1.0%
-0.5%
-1.0%
-1.5%
-2.0%

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PLL701-13 Summary of contents

Page 1

... Operating Voltage. Low short term jitter. Available in 8-Pin 150mil SOIC. DESCRIPTIONS The PLL701- Spread Spectrum Clock Generator designed for the purpose of reducing EMI in high-speed digital systems. The selectable Down Spread modulation amplitude (see table below) permits EMI reduction without over-clocking the output ...

Page 2

... Digital control input to select output frequency and SST modulation amplitude. I Has internal pull-down. P 3.3V Power Supply. SST Modulated Clock Frequency Output. The frequency before modulation is O synthesized by multiplying the input frequency by 1X, 2X, or 4X, depending on S(0:3). P Ground. PLL701-13 VDD FOUT Description Rev 11/07/02 Page 2 ...

Page 3

... SYMBOL SYMBOL CONDITIONS =5mA, VDD=3. =6mA, VDD=3. in1 R PIN PIN Load CC PLL701-13 MIN. MAX 0 0 0 260 -65 150 MIN ...

Page 4

... FUNCTIONAL DESCRIPTION Selectable spread spectrum and modulation rates The PLL701-13 provides selectable spread spectrum modulation, as well as selectable modulation rate. Selection is made by connecting specific pins to a logical “zero” or “one”, according to the output clock selection table and modulation rate selection table on page 1. ...

Page 5

... Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Low EMI Spread Spectrum Multiplier Clock SOIC Max. 1.73 0.25 0.51 0.25 4.95 4.00 6.20 1.27 A1 1.27 BSC B e 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL701- PLL701- TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE S=SOIC Rev 11/07/02 Page 5 ...

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