h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 123
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h8s-2111b
Manufacturer Part Number
h8s-2111b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2111B.pdf
(582 pages)
- Current page: 123 of 582
- Download datasheet (4Mb)
Figure 5.9 shows an example of address timing.
Break request
Break request
(1) When a break address specified instruction is executed for one state in the program area and on-chip memory
(2) When a break address specified instruction is executed for two states in the program area and on-chip memory
Address bus
Address bus
signal
signal
φ
φ
H'0310 NOP
H'0312 MOV.W #xx:16,Rd
H'0316 NOP
H'0318 NOP
Instruction
Instruction
H'0310
H'0310
fetch
fetch
H'0310 NOP
H'0312 NOP
H'0314 NOP
H'0316 NOP
execution
execution
Figure 5.9 Address Break Timing Example
NOP
Instruction
Instruction
NOP
H'0312 H'0314 H'0316
H'0312 H'0314 H'0316
fetch
fetch
execution
Instruction
Instruction
NOP
fetch
fetch
execution
MOV.W
Instruction
Instruction
Break point
execution
fetch
fetch
NOP
Break point
Instruction
Instruction
fetch
fetch
H'0318
H'0318
NOP instruction is executed at break point address
H'0312 and following address H'0314.
Fetching is performed from address H'0316
after exception handling ends.
operation
operation
Internal
Internal
MOV instruction is executed at break point address
H'0312, and NOP instruction is not executed
at the following address H'0314.
Fetching is performed from address H'0316
after exception handling ends.
Interrupt exception handling
Interrupt exception handling
SP-2
SP-2
to stack
to stack
Save
Save
Rev. 1.00, 05/04, page 89 of 544
SP-4
SP-4
Vector
Vector
fetch
fetch
H'0036
H'0036
Internal
operation
Internal
operation
Instruction
Instruction
fetch
fetch
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