h8s-2111b Renesas Electronics Corporation., h8s-2111b Datasheet - Page 197
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h8s-2111b
Manufacturer Part Number
h8s-2111b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2111B.pdf
(582 pages)
- Current page: 197 of 582
- Download datasheet (4Mb)
9.3.7
TCSR is used for counter clear selection and control of interrupt request signals.
Bit
7
Bit
2
1
0
Bit Name
OCIBE
OVIE
—
Bit Name
ICFA
Timer Control/Status Register (TCSR)
Initial
Value
0
0
0
Initial
Value
0
R/W
R/W
R/W
R
R/W
R/(W)*
Output Compare Interrupt B Enable
Timer Overflow Interrupt Enable
Description
Input Capture Flag A
This status flag indicates that the FRC value has been
transferred to ICRA by means of an input capture
signal. When BUFEA = 1, ICFA indicates that the old
ICRA value has been moved into ICRC and the new
FRC value has been transferred to ICRA. Only 0 can be
written to this bit to clear the flag.
[Setting condition]
When an input capture signal causes the FRC value to
be transferred to ICRA
[Clearing condition]
Read ICFA when ICFA = 1, then write 0 to ICFA
Description
Selects whether to enable output compare interrupt B
request (OCIB) when output compare flag B (OCFB) in
TCSR is set to 1.
0: OCIB requested by OCFB is disabled
1: OCIB requested by OCFB is enabled
Selects whether to enable a free-running timer overflow
request interrupt (FOVI) when the timer overflow flag
(OVF) in TCSR is set to 1.
0: FOVI requested by OVF is disabled
1: FOVI requested by OVF is enabled
Reserved
This bit is always read as 1 and cannot be modified.
Rev. 1.00, 05/04, page 163 of 544
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