h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 117
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h8s-2158
Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2158.pdf
(927 pages)
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4.1
As table 4.1 indicates, exception handling may be caused by a reset, interrupt, direct transition, or
trap instruction. Exception handling is prioritized as shown in table 4.1. If two or more exceptions
occur simultaneously, they are accepted and processed in order of priority.
Table 4.1
Priority
High
Low
Exception Handling Types and Priority
Exception Type
Reset
Interrupt
Direct transition
Trap instruction
Exception Types and Priority
Section 4 Exception Handling
Started by execution of a trap (TRAPA) instruction. Trap
Start of Exception Handling
Starts immediately after a low-to-high transition of the RES pin,
or when the watchdog timer overflows.
Starts when execution of the current instruction or exception
handling ends, if an interrupt request has been issued. Interrupt
detection is not performed on completion of ANDC, ORC,
XORC, or LDC instruction execution, or on completion of reset
exception handling.
Starts when a direction transition occurs as the result of SLEEP
instruction execution.
instruction exception handling requests are accepted at all times
in program execution state.
Rev. 3.00 Jan 25, 2006 page 65 of 872
Section 4 Exception Handling
REJ09B0286-0300
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