h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 166
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 166 of 570
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RAS Down Mode and RAS Up Mode: Even when burst operation is selected, it may happen that
access to DRAM space is not continuous, but is interrupted by access to another space. In this
case, if the RAS signal is held low during the access to the other space, burst operation can be
resumed when the same row address in DRAM space is accessed again.
• RAS Down Mode
Rev. 2.00, 03/04, page 134 of 534
To select RAS down mode, set both the RCDM bit and the BE bit to 1 in DRAMCR. If access
to DRAM space is interrupted and another space is accessed, the RAS signal is held low
during the access to the other space, and burst access is performed when the row address of the
next DRAM space access is the same as the row address of the previous DRAM space access.
Figure 6.33 shows an example of the timing in RAS down mode.
When the row address for the next DRAM space access does not match the row address for the
previous DRAM space access and the RAS down state cannot be continued, one-state RAS up
cycle (T
the idle cycle insertion when RAS down mode is not continued.
Note, however, that the RAS signal will go high if:
a refresh operation is initiated in the RAS down state
self-refreshing is performed
the chip enters software standby mode
the RCDM bit or BE bit is cleared to 0
RU
) is inserted immediately before the DRAM access. Figure 6.34 shows an example of
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