h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 239
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 239 of 570
- Download datasheet (5Mb)
External Request/Cycle Steal Mode/Block Transfer Mode: In block transfer mode, transfer of
one block is performed continuously in the same way as in burst mode. The timing of the start of
the next block transfer is the same as in normal transfer mode. If a transfer request is generated for
another channel, an DMA cycle for the other channel is generated before the next block transfer.
The DREQ pin sensing timing is different for low level sensing and falling edge sensing. The
same applies to transfer request acceptance and transfer start timing.
Figures 7.42 to 7.45 show operation timing examples for various conditions.
• No contention/dual address mode/low level sensing (see figure 7.42)
• No contention/single address mode/falling edge sensing (see figure 7.43)
• CPU cycles/single address mode/low level sensing (see figure 7.44)
• Contention with another channel/dual address mode/low level sensing (see figure 7.45)
Rev. 2.00, 03/04, page 207 of 534
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