h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 24
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
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Figure 7.25 Example of Single Address Mode (Word Read) Transfer....................................... 196
Figure 7.26 Example of Single Address Mode (Longword Read) Transfer ............................... 197
Figure 7.27 Example of Single Address Mode (Byte Write) Transfer ....................................... 197
Figure 7.28 Example of Single Address Mode (Word Write) Transfer...................................... 198
Figure 7.29 Example of Single Address Mode (Longword Write) Transfer .............................. 198
Figure 7.30 Example of Single Address Mode Transfer Activated by DREQ Pin
Figure 7.31 Example of Single Address Mode Transfer Activated by DREQ Pin
Figure 7.32 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 7.33 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 7.34 Auto Request/Cycle Steal Mode/Normal Transfer Mode
Figure 7.35 Auto Request/Burst Mode/Normal Transfer Mode
Figure 7.36 Auto Request/Burst Mode/Normal Transfer Mode
Figure 7.37 Auto Request/Burst Mode/Normal Transfer Mode
Figure 7.38 External Request/Cycle Steal Mode/Normal Transfer Mode
Figure 7.39 External Request/Cycle Steal Mode/Normal Transfer Mode
Figure 7.40 External Request/Cycle Steal Mode/Normal Transfer Mode
Figure 7.41 External Request/Cycle Steal Mode/Normal Transfer Mode
Figure 7.42 External Request/Cycle Steal Mode/Block Transfer Mode
Figure 7.43 External Request/Cycle Steal Mode/Block Transfer Mode
Figure 7.44 External Request/Cycle Steal Mode/Block Transfer Mode
Figure 7.45 External Request/Cycle Steal Mode/Block Transfer Mode
Figure 7.46 Transfer End Interrupt Logic................................................................................... 214
Figure 7.47 Example of Procedure for Restarting Transfer on Channel in which Transfer End
Rev. 2.00, 03/04, page xxiv of xxxii
Falling Edge ............................................................................................................ 199
Low Level ............................................................................................................... 200
(No Contention/Dual Address Mode)...................................................................... 201
(CPU Cycles/Single Address Mode) ....................................................................... 202
(Contention with Another Channel/Single Address Mode)..................................... 202
(CPU Cycles/Dual Address Mode).......................................................................... 203
(CPU Cycles/Single Address Mode) ....................................................................... 203
(Contention with Another Channel/Single Address Mode)..................................... 204
(No Contention/Dual Address Mode/Low Level Sensing)...................................... 205
(CPU Cycles/Single Address Mode/Low Level Sensing) ....................................... 205
(No Contention/Single Address Mode/Falling Edge Sensing) ................................ 206
(Contention with Another Channel/Dual Address Mode/Low Level Sensing) ....... 206
(No Contention/Dual Address Mode/Low Level Sensing)...................................... 208
(No Contention/Single Address Mode/Falling Edge Sensing) ................................ 209
(CPU Cycles/Single Address Mode/Low Level Sensing) ....................................... 210
(Contention with Another Channel/Dual Address Mode/Low Level Sensing) ....... 211
Interrupt Occurred ................................................................................................... 215
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