h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 323
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 323 of 570
- Download datasheet (5Mb)
This LSI has a serial communication interface for boot mode (SCI) which is on-board
programming mode of flash memory. The SCI can handle asynchronous serial communication.
Serial data communication can be carried out with standard asynchronous communication chips
such as a Universal Asynchronous Receiver/Transmitter (UART) or Asynchronous
Communication Interface Adapter (ACIA). Figure 11.1 shows a block diagram of the SCI.
11.1
• Choice of asynchronous or clocked synchronous serial communication mode
• Full-duplex communication capability
• On-chip baud rate generator allows any bit rate to be selected
• Choice of LSB-first
• Four interrupt sources
• Module stop mode can be set
Asynchronous mode
• Data length: 7 or 8 bits
• Stop bit length: 1 or 2 bits
• Parity: Even, odd, or none
• Receive error detection: Parity, overrun, and framing errors
• Break detection: Break can be detected by reading the RxD pin level directly in case of a
Section 11 Serial Communication Interface for Boot Mode
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously. Double-buffering is used in both the transmitter and the receiver,
enabling continuous transmission and continuous reception of serial data.
Four interrupt sources transmit-end, transmit-data-empty, receive-data-full, and receive
error that can issue requests.
framing error
Features
(SCI)
Rev. 2.00, 03/04, page 291 of 534
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