h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 355

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

12.3.1
IFR0 indicates the setup request reception, EP0i, EP0o, EP1, EP2, and EP3
transmission/reception, and bus reset state and monitors a VBUS interrupt flag and USB mode
interrupt flag. If the corresponding flag is set to 1, the corresponding interrupt request is output. A
flag in this register can be cleared by writing 0 to it. Writing 1 to a flag is invalid and causes no
operation. Note that the EP1FULL and EP2EMPTY bits are status bits indicating the FIFO states
of the EP1 and EP2. Therefore these bits cannot be cleared. The VBUS MN and MODE MN bits
are also status bits so they cannot be cleared.
Bit
31 to 27
26
25
Interrupt Flag Register 0 (IFR0)
Bit Name

MODE MN1 0
MODE MN0 0
Initial
Value
All 0
R/W
R
R
R
Description
Reserved
The write value should always be 0.
USB Mode Status 1
This bit is a status bit which indicates the USB
transfer mode. This bit is used as two bits with the
MODE MN0 bit.
0: At a reset or when the cable is disconnected
1: Full-speed mode (12 Mbps)
2: High-speed mode (480 Mbps)
3: Chirp mode
Refer to section 12.8.12, USB Bus Idle in High-Speed
Mode.
This bit cannot be cleared because this bit is a status
bit.
USB Mode Status 0
This bit is a status bit which indicates the USB
transfer mode. This bit is used as two bits with the
MODE MN1 bit.
This bit cannot be cleared because this bit is a status
bit.
Rev. 2.00, 03/04, page 323 of 534