h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 387

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

12.5.8
This section describes stall operations in the USB module. There are two cases in which the USB
module stall function is used:
• When the firmware forcibly stalls an endpoint for some reason
• When a stall is performed automatically within the USB module due to a USB specification
The USB module has internal status bits that hold the status (stall or non-stall) of each endpoint.
When a transaction is sent from the host, the module refers these internal status bits and
determines whether to return a stall to the host. These bits cannot be cleared by the firmware; they
must be cleared with a Clear Feature request from the host. However, the internal status bit for
EP0 is cleared automatically at the reception of the setup request.
1. Forcible Stall by Firmware
violation
The firmware uses EPSTL0 to issue a stall request for the USB module. When the firmware
wishes to stall a specific endpoint, it sets the corresponding bit in EPSTL0 (1-1 in figure
12.13). The internal status bits are not changed at this time.
When a transaction is sent from the host for the endpoint for which the corresponding bit in
EPSTL0 was set, the USB module refers the internal status bit, and if this is not set, refers the
corresponding bit in EPSTL0 (1-2 in figure 12.13). If the corresponding bit in EPSTL0 is set,
the USB module sets the internal status bit and returns a stall handshake to the host (1-3 in
figure 12.13). If the corresponding bit in EPSTL0 is not set, the internal status bit is not
changed and the transaction is accepted.
Once an internal status bit is set, it remains set until cleared by a Clear Feature request from
the host, without regarding to EPSTL0. Even after a corresponding bit is cleared by the Clear
Feature request (3-1 in figure 12.13), the USB module continues to return a stall handshake
while the bit in EPSTL0 is set, since the internal status bit is set each time a transaction is
executed for the corresponding endpoint (1-2 in figure 12.13). To clear a stall, therefore, it is
necessary for the corresponding bit in EPSTL0 to be cleared by the firmware and also for the
internal status bit to be cleared with a Clear Feature request (2-1, 2-2, and 2-3 in figure 12.13).
Stall Operations
Rev. 2.00, 03/04, page 355 of 534