h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 116
h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
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Section 5 Interrupt Controller
5.4
5.4.1
There are seven external interrupts: NMI and IRQ0 to IRQ5. These interrupts can be used to
restore this LSI from software standby mode.
NMI Interrupt: NMI is the highest-priority interrupt, and is always accepted by the CPU
regardless of the interrupt control mode or the status of the CPU interrupt mask bits. The NMIEG
bit in SYSCR can be used to select whether an interrupt is requested at a rising edge or a falling
edge on the NMI pin.
IRQ0 to IRQ5 Interrupts: Interrupts IRQ0 to IRQ5 are requested by an input signal at pins IRQ0
to IRQ5. Interrupts IRQ0 to IRQ5 have the following features:
• Using ISCR, it is possible to select whether an interrupt is generated by a low level, falling
• Enabling or disabling of interrupt requests IRQ0 to IRQ5 can be selected with IER.
• The interrupt priority level can be set with IPR.
• The status of interrupt requests IRQ0 to IRQ5 is indicated in ISR. ISR flags can be cleared to 0
The detection of IRQ0 to IRQ5 interrupts does not depend on whether the relevant pin has been
set for input or output. However, when a pin is used as an external interrupt input pin, do not clear
the corresponding DDR to 0; and use the pin as an I/O pin for another function.
A block diagram of interrupts IRQ0 to IRQ5 is shown in figure 5.2.
Rev. 2.00 Dec. 05, 2005 Page 78 of 724
REJ09B0200-0200
edge, rising edge, or both edges, at pins IRQ0 to IRQ5.
by software.
IRQn input
Note: n = 5 to 0
Interrupt Sources
External Interrupts
Figure 5.2 Block Diagram of Interrupts IRQ0 to IRQ5
IRQnSCA, IRQnSCB
detection circuit
Edge/level
Clear signal
R
S
IRQnF
Q
IRQnE
IRQn interrupt
request
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