h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 131
h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
- Current page: 131 of 766
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The PC break controller (PBC) provides functions that simplify program debugging. Using these
functions, it is easy to create a self-monitoring debugger, enabling programs to be debugged with
the chip alone, without using an in-circuit emulator. A block diagram of the PC break controller is
shown in figure 6.1.
6.1
• Two break channels (A and B)
• 24-bit break address
• Four types of break compare conditions
• Bus master
• The timing of PC break exception handling after the occurrence of a break condition is as
• Module stop mode can be set
PBC0000A_000020020300
Bit masking possible
Instruction fetch
data read
data write
data read/write
Either CPU or CPU/DTC can be selected
follows:
Immediately before execution of the instruction fetched at the set address (instruction
Immediately after execution of the instruction that accesses data at the set address (data
fetch)
access)
Features
Section 6 PC Break Controller (PBC)
Rev. 2.00 Dec. 05, 2005 Page 93 of 724
Section 6 PC Break Controller (PBC)
REJ09B0200-0200
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