AD5522JSVD AD [Analog Devices], AD5522JSVD Datasheet - Page 29

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AD5522JSVD

Manufacturer Part Number
AD5522JSVD
Description
Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs
Manufacturer
AD [Analog Devices]
Datasheet

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Preliminary Technical Data
Table 12. BUSY Pulse Width
Action
Loading data to PMU, System Control
Register or Readback
Loading x1 to any 1 PMU DAC Channel
Loading x1 to any 2 PMU DAC Channels
Loading x1 to any 3 PMU DAC Channels
Loading x1 to any 4 PMU DAC Channels
BUSY Pulse Width = ((Number of channels +1) × 500ns) + 250ns
BUSY also goes low during power-on reset and when a falling
edge is detected on the RESET pin.
Writing data to the System control register, PMU control
register, m or c registers do not involve the digital calibration
engine, thus speeding up configuration of the device on power
on.
WRITE
~600ns
#1
STAGE
500ns
1st
Figure 26. Multiple writes to DAC x1 registers
Calibration Engine Time
STAGE
STAGE
500ns
1st
2nd
STAGE
250ns
STAGE
3rd
STAGE
WRITE
1st
2nd
#2
STAGE
3rd
STAGE
2nd
STAGE
1st
BUSY Pulse Width
(μs max)
0.27
1.25
1.75
2.25
2.75
STAGE
3rd
STAGE
2nd
3 FIN DAC REGISTERS
e.g. WRITE TO
STAGE
3rd
Rev. PrM | Page 29 of 48
REGISTER UPDATE RATES
As mentioned previously the value of the X2 register is
calculated each time the user writes new data to the
corresponding X1 register. The calculation is performed by a
three stage process. The first two stages take 500ns each and the
third stage takes 250ns. When the writes to one of the X1
registers is complete the calculation process begins. If the write
operation involves the update of a single DAC channel the user
is free to write to another register provided that the write
operation doesn’t finish until the first stage calculation is
complete, i.e. 500ns after the completion of the first write
operation.
~600ns
WRITE
#1
Figure 27. Multiple Single Channel writes engaging calibration engine
STAGE
WRITE
500ns
1st
#2
Calibration Engine Time
STAGE
500ns
STAGE
2nd
WRITE
1st
#3
STAGE
250ns
3rd
STAGE
STAGE
2nd
1st
STAGE
3rd
STAGE
2nd
AD5522
STAGE
3rd

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