LTC2421 LINER [Linear Technology], LTC2421 Datasheet - Page 21
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LTC2421
Manufacturer Part Number
LTC2421
Description
1-/2-Channel 20-Bit UPower No Latency ADCs in MSOP-10
Manufacturer
LINER [Linear Technology]
Datasheet
1.LTC2421.pdf
(32 pages)
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APPLICATIO S I FOR ATIO
to take advantage of exceptional accuracy and low supply
current.
The digital output signals (SDO and SCK in Internal SCK
mode of operation) are less of a concern because they are
not generally active during the conversion state.
7
6
5
4
3
2
1
0
Figure 13. CS Capacitance vs t
1
(INTERNAL)
10
CAPACITANCE ON CS (pF)
GND
SDO
SCK
V
CS
CC
100
U
CONVERSION
1000
V
CC
U
= 5V
10000
V
CC
SAMPLE
24212 F13
= 3V
100000
Hi-Z
W
Figure 12. Internal Serial Clock, Autostart Operation
ANALOG INPUT RANGE
(V
ZS
REF
REFERENCE VOLTAGE
0V TO FS
ZS
SET
SLEEP
FS
= FS
SET
SET
– 0.12V
300
250
200
150
100
50
SET
+ 0.1V TO V
0
+ 0.12V
SET
1
– ZS
Figure 14. CS Capacitance
vs Output Rate
U
– 100mV
REF
SET
1 F
REF
2.7V TO 5.5V
TO
10
)
CC
CAPACITANCE ON CS (pF)
V
V
CC
CC
BIT 23
= 5V
= 3V
EOC
1
2
3
4
5
100
V
FS
CH1
ZS
CH0
CC
SET
SET
LTC2422
In order to preserve the LTC2421/LTC2422’s accuracy, it
is very important to minimize the ground path impedance
which may appear in series with the input and/or reference
signal and to reduce the current which may flow through
this path. The GND pin should be connected to a low
1000
BIT 22
SDO
GND
SCK
CS
F
O
10000
10
9
8
7
6
DATA OUTPUT
24212 F15
BIT 21
SIG
100000
C
EXT
V
CC
= INTERNAL OSC/50Hz REJECTION
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/60Hz REJECTION
300
250
200
150
100
50
0
LTC2421/LTC2422
1
Figure 15. CS Capacitance
vs Supply Current
BIT 0
10
CAPACITANCE ON CS (pF)
V
V
CC
CC
= 5V
= 3V
100
CONVERSION
1000
Hi-Z
V
CC
2420 F12
10k
10000
21
24212 F15
100000
24212f