SC16C2550B_07 PHILIPS [NXP Semiconductors], SC16C2550B_07 Datasheet - Page 27

• Manufacturer Part Number: SC16C2550B_07
• Description: 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
Table 25.
T
[1]
[2]
[3]
SC16C2550B_4
Product data sheet
Symbol
t
t
N
28d
RESET
amb
Fig 8. General write timing
Applies to external clock, crystal oscillator max 24 MHz.
Maximum frequency =
RCLK is an internal signal derived from divisor latch LSB (DLL) and divisor latch MSB (DLM) divisor latches.
= 40 C to +85 C; tolerance of V
Parameter
delay from start to reset
TXRDY
RESET pulse width
baud rate divisor
D0 to D7
Dynamic characteristics
A0 to A2
IOW
CSx
10.1 Timing diagrams
-------
t
3w
1
t
6s
t
13d
…continued
CC
Conditions
address
valid
active
10 %; unless otherwise specified.
active
t
13w
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Rev. 04 — 15 February 2007
t
16s
data
t
t
16h
t
[3]
13h
6h
Min
200
V
1
-
CC
t
15d
= 2.5 V
(2
8T
Max
16
RCLK
-
1)
Min
40
V
1
-
CC
= 3.3 V
(2
8T
Max
16
RCLK
-
SC16C2550B
1)
Min
40
V
1
-
CC
© NXP B.V. 2007. All rights reserved.
002aaa109
= 5.0 V
(2
8T
Max
16
RCLK
-
1)
27 of 43
Unit
s
ns