SC16C554BIB64 PHILIPS [NXP Semiconductors], SC16C554BIB64 Datasheet - Page 33

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SC16C554BIB64

Manufacturer Part Number
SC16C554BIB64
Description
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Product data sheet
7.10 SC16C554B/554DB external reset conditions
7.9 Scratchpad Register (SPR)
Table 21:
[1]
The SC16C554B/554DB provides a temporary data register to store 8 bits of user
information.
Table 22:
Table 23:
Bit
1
0
Register
IER
ISR
LCR
MCR
LSR
MSR
FCR
Output
TXA, TXB, TXC, TXD
RTSA, RTSB, RTSC, RTSD
DTRA, DTRB, DTRC, DTRD
RXRDY
TXRDY
Whenever any MSR[3:0] is set to logic 1, a Modem Status Interrupt will be generated.
Symbol
MSR[1]
MSR[0]
Modem Status Register bits description
Reset state for registers
Reset state for outputs
Reset state
IER[7:0] = 0
ISR[7:1] = 0; ISR[0] = 1
LCR[7:0] = 0
MCR[7:0] = 0
LSR[7] = 0; LSR[6:5] = 1; LSR[4:0] = 0
MSR[7:4] = input signals; MSR[3:0] = 0
FCR[7:0] = 0
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
Description
DSR
CTS
Logic 0 = No DSR change (normal default condition).
Logic 1 = The DSR input to the SC16C554B/554DB has changed state
since the last time it was read. A modem Status Interrupt will be
generated.
Logic 0 = No CTS change (normal default condition).
Logic 1 = The CTS input to the SC16C554B/554DB has changed state
since the last time it was read. A modem Status Interrupt will be
generated.
Rev. 01 — 9 February 2005
[1]
[1]
Reset state
HIGH
HIGH
HIGH
HIGH
LOW
SC16C554B/554DB
…continued
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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