SC16C554BIB64 PHILIPS [NXP Semiconductors], SC16C554BIB64 Datasheet - Page 9

• Manufacturer Part Number: SC16C554BIB64
• Description: 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 2:
9397 750 13133
Product data sheet
Symbol
16/68
A0
A1
A2
A3, A4
CDA, CDB,
CDC, CDD
CS
CSA, CSB,
CSC, CSD
CTSA, CTSB,
CTSC, CTSD
Pin description
Pin
PLCC68 LQFP64 LQFP80
31
34
33
32
20, 50
9, 27,
43, 61
16
16, 20,
50, 54
11, 25,
45, 59
5.2 Pin description
-
24
23
22
-
64, 18,
31, 49
-
7, 11,
38, 42
2, 16,
33, 47
-
48
47
46
-
19, 42,
59, 2
-
28, 33,
68, 73
23, 38,
63, 78
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
Type
I
I
I
I
I
I
I
I
I
Rev. 01 — 9 February 2005
Description
16/68 Interface type select (input with internal pull-up). This
input provides the 16 (Intel) or 68 (Motorola) bus interface type
select. The functions of IOR, IOW, INTA to INTD, and CSA to CSD
are re-assigned with the logical state of this pin. When this pin is a
logic 1, the 16 mode interface (16C554) is selected. When this pin
is a logic 0, the 68 mode interface (68C554) is selected. When this
pin is a logic 0, IOW is re-assigned to R/W, RESET is re-assigned
to RESET, IOR is not used, and INTA to INTD are connected in a
wire-OR configuration. The wire-OR outputs are connected
internally to the open drain IRQ signal output. This pin is not
available on 64-pin packages which operate in the 16 mode only.
Address 0 select bit. Internal registers address selection in 16 and
68 modes.
Address 1 select bit. Internal registers address selection in 16 and
68 modes.
Address 2 select bit. Internal registers address selection in 16 and
68 modes.
Address 3 to Address 4 select bits. When the 68 mode is
selected, these pins are used to address or select individual UARTs
(providing CS is a logic 0). In the 16 mode, these pins are
re-assigned as chip selects, see CSB and CSC.
Carrier Detect (active LOW). These inputs are associated with
individual UART channels A through D. A logic 0 on this pin
indicates that a carrier has been detected by the modem for that
channel.
Chip Select (active LOW). In the 68 mode, this pin functions as a
multiple channel chip enable. In this case, all four UARTs (A to D)
are enabled when the CS pin is a logic 0. An individual UART
channel is selected by the data contents of address bits A3 to A4.
when the 16 mode is selected (68-pin devices), this pin functions as
CSA (see definition under CSA, CSB).
Chip Select A, B, C, D (active LOW). This function is associated
with the 16 mode only, and for individual channels ‘A’ through ‘D’.
When in 16 mode, these pins enable data transfers between the
user CPU and the SC16C554B/554DB for the channel(s)
addressed. Individual UART sections (A, B, C, D) are addressed by
providing a logic 0 on the respective CSA to CSD pin. When the
68 mode is selected, the functions of these pins are re-assigned.
68 mode functions are described under their respective name/pin
headings.
Clear to Send (active LOW). These inputs are associated with
individual UART channels A to D. A logic 0 on the CTS pin indicates
the modem or data set is ready to accept transmit data from the
SC16C554B/554DB. Status can be tested by reading MSR[4]. This
pin only affects the transmit or receive operations when auto-CTS
function is enabled via MCR[5] for hardware flow control operation.
SC16C554B/554DB
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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