TFA9812HN PHILIPS [NXP Semiconductors], TFA9812HN Datasheet - Page 25

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TFA9812HN

Manufacturer Part Number
TFA9812HN
Description
BTL stereo Class-D audio amplifier with I2S input
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
NXP Semiconductors
TFA9812_2
Preliminary data sheet
8.7.10 Overfrequency protection
8.7.6 Overdissipation protection
8.7.7 Window protection
8.7.8 Lock protection
8.7.9 Underfrequency protection
Table 20.
When the output current of the power amplifiers exceeds a current value of 3 A and the
temperature is above 140 C, overdissipation protection is activated and the device enters
Sleep mode. A restart will be initiated automatically when the two overdissipation
conditions are both changed to ‘false’.
Overdissipation is flagged by a low DIAG pin and by a high DIAG I
Section
Under normal conditions thermal foldback prevents overdissipation protection from being
triggered. I
Window protection is a feature for protecting the device against shorts from the outputs to
the ground or supply lines. If during power-up one of the outputs is shorted to V
V
The WP alarm is flagged by a low DIAG pin and by a high DIAG I
Section
When the selected clock input source (MCLK, BCK or crystal) stops running, the TFA9812
is able to detect this and set the output stages to 3-state mode. Without this protection
peripheral devices in an application might be damaged.
The PLL lock indication is an I
interruption, see
UFP sets the output stages to 3-state mode when the clock input source is too low. The
PWM switching frequency can becomes critically low when the clock input source is lower
than specified. Without UFP peripheral devices in an application might be damaged.
The status of the UFP is shown in I
OFP sets the output stages to 3-state mode when the clock input source is too high. The
PWM controller can become unstable when the clock input source is higher than
specified. Without OFP peripheral devices in an application might be damaged.
The status of the OFP is shown in I
Pin name
V
V
DDP
DDA
DDA(3V3)
OUTxx > V
OUTxx < REFA + 1 V.
, power-up does not proceed any further. The trigger levels for these conditions are:
9.5.10.
9.5.10.
Undervoltage trigger levels
2
C settings remain valid.
DDA
Section
1 V, or
Rev. 02 — 22 January 2009
UVP level
Min
7 V
1.6 V
9.5.10.
2
C reading and will be ‘false’ in the event of a clock
2
2
C reading register, see
C reading register, see
BTL stereo Class-D audio amplifier with I
Max
< 8 V
< 3 V
Section
DIAG pin (protection active)
LOW
-
Section
2
C status bit, see
2
C status bit, see
9.5.10.
9.5.10.
© NXP B.V. 2009. All rights reserved.
TFA9812
SSPx
2
S input
25 of 66
or

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