TFA9812HN PHILIPS [NXP Semiconductors], TFA9812HN Datasheet - Page 7

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TFA9812HN

Manufacturer Part Number
TFA9812HN
Description
BTL stereo Class-D audio amplifier with I2S input
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
NXP Semiconductors
TFA9812_2
Preliminary data sheet
Table 3.
Pin
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
Pinning description TFA9812
Symbol
OUT2N
BOOT1P
OUT1P
OUT1P
V
V
OUT2P
OUT2P
BOOT2P
OUT1N
OUT1N
BOOT1N
V
V
STAB1
DIAG
CDELAY
POWERUP
AVOL
ENABLE
GAIN
CSEL
ADSEL2/PLIM2 I
ADSEL1/PLIM1 I
SCL/SFOR
SDA/MS
V
STABD
REFD
TEST2
DATA
WS
BCK
DDP
DDP
SSP1
SSP1
DDD(3V3)
Rev. 02 — 22 January 2009
Type Description
O
O
O
O
P
P
O
O
O
O
O
O
P
P
O
O
I
I
I
I
I
I
I
I/O
P
O
P
I
I
I/O
I/O
Negative PWM output channel 2
Bootstrap high-side driver positive PWM output channel 1
Positive PWM output channel 1
Positive PWM output channel 1
Positive power supply voltage (8 V to 20 V)
Positive power supply voltage (8 V to 20 V)
Positive PWM output channel 2
Positive PWM output channel 2
Bootstrap high-side driver positive PWM output channel 2
Negative PWM output channel 1
Negative PWM output channel 1
Bootstrap high-side driver negative PWM output channel 1
Negative power supply voltage for channel 1 and channel 2
Negative power supply voltage for channel 1 and channel 2
Decoupling of internal 11 V regulator for channel 1 drivers
Fault mode indication output (open-drain pin)
Timing reference
Power-up pin to switch between Sleep and other operational
modes
Analog volume control (Legacy mode)
Enable input to switch between 3-state and other
operational modes
Gain selection input to select between 0 dB and +24 dB
gain (Legacy mode)
Control selection input to select between Legacy mode
(no I
Address selection in I
selection input 2 in Legacy mode
Address selection in I
selection input 1 in Legacy mode
I
selection input in Legacy mode
I
selection input in Legacy mode
Digital supply voltage (3.3 V)
1.8 V digital stabilizer output
Digital reference voltage
Test signal input 2; for test purposes only (connect to V
I
I
master mode)
I
master mode)
2
2
2
2
2
C bus clock input in I
C bus data input and output in I
S bus data input
S bus word select input (I
S bus bit clock input (I
BTL stereo Class-D audio amplifier with I
2
…continued
C bus control) and I
2
2
2
C mode input 2, power limiter
C mode input 1, power limiter
C mode, I
2
S slave mode) or output (I
2
C bus control
2
S slave mode) or output (I
2
2
S serial data format
C mode, master/slave
© NXP B.V. 2009. All rights reserved.
TFA9812
2
2
S
S input
2
7 of 66
S
SS
)

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