LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 120
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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5-4
START
WATN
SCSI Operating Registers
2. It asserts SBSY/ and its SCSI ID (the highest priority
3. If the SSEL/ signal is asserted by another SCSI device
4. The LSI53C875 repeats arbitration until it wins control
5. The LSI53C875 performs selection by asserting the
6. After a selection is complete, the Function Complete
7. If a selection time-out occurs, the Selection Time-Out
Start Sequence
When this bit is set, the LSI53C875 starts the arbitration
sequence indicated by the Arbitration Mode bits. The
Start Sequence bit is accessed directly in low level mode;
during SCSI SCRIPTS operations, this bit is controlled by
the SCRIPTS processor. Do not start an arbitration
sequence if the connected (CON) bit in the
One (SCNTL1)
LSI53C875 is already connected to the SCSI bus. This bit
is automatically cleared when the arbitration sequence is
complete. If a sequence is aborted, check bit 4 in the
SCSI Control One (SCNTL1)
LSI53C875 is not connected to the SCSI bus.
Select with SATN/ on a Start Sequence
When this bit is set and the LSI53C875 is in the initiator
mode, the SATN/ signal is asserted during selection of a
SCSI target device. This is to inform the target that the
LSI53C875 has a message to send. If a selection
ID stored in the
SCSI bus.
or if the LSI53C875 detects a higher priority ID, the
LSI53C875 deasserts BSY, deasserts its ID, and waits
until the next bus free state to try arbitration again.
of the SCSI bus. When it wins, the Won Arbitration bit
is set in the
following onto the SCSI bus: SSEL/, the target’s ID
(stored in the
and the LSI53C875’s ID (stored in the
(SCID)
bit is set in the
register, bit 6.
bit is set in the
register, bit 2.
register).
SCSI Status Zero (SSTAT0)
register, bit 4, indicates that the
SCSI Destination ID (SDID)
SCSI Chip ID (SCID)
SCSI Interrupt Status Zero (SIST0)
SCSI Interrupt Status One (SIST1)
register to verify that the
register) onto the
SCSI Chip ID
SCSI Control
register, bit 2.
register),
5
4
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