LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 133
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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Table 5.3
(MHz)
66.67
66.67
37.50
33.33
16.67
CLK
80
80
50
50
40
25
20
SCSI CLK
Bits [6:4]
SCNTL3
Example Transfer Periods for Fast SCSI-2 and Ultra SCSI Transfer Rates
1.5
1.5
1
2
1
1
1
1
1
1
1
1
MO[4:0]
XFERP
4
4
4
5
4
5
4
4
4
4
4
4
Max SCSI Synchronous Offset
These bits describe the maximum SCSI synchronous
offset used by the LSI53C875 when transferring
synchronous SCSI data in either initiator or target mode.
Table 5.4
relationship to the synchronous data offset used by the
LSI53C875. These bits determine the LSI53C875’s
method of transfer for Data-In and Data-Out phases only.
All other information transfers occur asynchronously.
Synch. Send
(Mbytes/s)
11.11
9.375
Rate
20.0
10.0
8.88
12.5
10.0
10.0
8.33
6.25
4.17
5
describes the possible combinations and their
Period (ns)
Transfer
Synch.
106.67
112.5
100
100
100
120
160
200
240
50
90
80
Synch. Receive
Rate (Mbytes)
11.11
11.11
9.375
20.0
10.0
12.5
12.5
10.0
8.33
6.25
4.17
5
Period (ns)
Receive
Synch.
106.67
100
100
120
160
200
240
50
90
90
80
80
[4:0]
5-17
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