LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 162
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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31
31
0
x
0
x
0
x
0
x
0
x
0
x
0
x
Registers: 0x2C–0x2F (0xAC–0xAF)
DMA SCRIPTS Pointer (DSP)
Read/Write
DSP
Registers: 0x30–0x33 (0xB0–0xB3)
DMA SCRIPTS Pointer Save (DSPS)
Read/Write
DSPS
SCSI Operating Registers
0
x
0
x
0
x
0
x
0
x
DMA SCRIPTS Pointer
To execute SCSI SCRIPTS, the address of the first
SCRIPTS instruction must be written to this register. In
normal SCRIPTS operation, once the starting address of
the SCRIPT is written to this register, SCRIPTS are
automatically fetched and executed until an interrupt
condition occurs.
In single step mode, there is a single step interrupt after
each instruction is executed. The
(DSP)
address, but the Start DMA bit (bit 2,
(DCNTL)
interrupt occurs to fetch and execute the next SCRIPTS
command. When writing this register eight bits at a time,
writing the upper eight bits begins execution of SCSI
SCRIPTS. The default value of this register is zero.
DMA SCRIPTS Pointer Save
This register contains the second Dword of a SCRIPTS
instruction. It is overwritten each time a SCRIPTS
instruction is fetched. When a SCRIPTS interrupt
instruction is executed, this register holds the interrupt
vector. The power-up value of this register is
indeterminate.
0
x
0
x
0
x
register does not need to be written with the next
DSPS
0
x
DSP
register) must be set each time the step
0
x
0
x
0
x
0
x
0
x
0
x
0
x
0
x
DMA SCRIPTS Pointer
0
x
0
x
DMA Control
0
x
0
x
0
x
0
x
[31:0]
[31:0]
0
x
0
0
0
x
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