LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 195
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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31
x
x
x
x
x
x
x
Registers: 0x5C–0x5F (0xDC–0xDF)
Scratch Register B (SCRATCHB)
Read/Write
SCRATCHB
Registers: 0x60–0x7F (0xE0–0xFF)
Scratch Registers C–J (SCRATCHC–SCRATCHJ)
Read/Write
These registers are general purpose scratch registers for user-defined
functions. The LSI53C875 cannot fetch SCRIPTS instructions from this
location. The power-up value of these registers is indeterminate.
x
x
x
x
x
Scratch Register B
This is a general purpose user definable scratch pad
register. Apart from CPU access, only register
Read/Write and Memory Moves directed at the
SCRATCH register will alter its contents. The LSI53C875
cannot fetch SCRIPTS instructions from this location.
When bit 3 in the
this register contains the base address for the 4 Kbytes
internal RAM. Setting
causes the base address to appear in the
ister B (SCRATCHB)
previously in the register remains intact. Any writes to this
register while the bit is set pass through to the actual
Scratch Register B (SCRATCHB)
values are indeterminate.
x
x
SCRATCHB
x
x
x
x
Chip Test Two (CTEST2)
x
x
register; any information that was
Chip Test Two (CTEST2),
x
x
x
x
register. The power-up
x
x
x
register is set,
Scratch Reg-
x
x
bit 3 only
x
[31:0]
x
5-79
0
x
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