LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 217
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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6.3.2 Second Dword
6.4 Read/Write Instructions
6.4.1 First Dword
R
SA
The Read/Write instruction supports addition, subtraction, and
comparison of two separate values within the chip. It performs the
desired operation on the specified register and the
Received (SFBR)
register or the SFBR.
IT[1:0]
OPC[2:0]
Read/Write Instructions
The Set/Clear SCSI ACK/ATN instruction is used after
message phase Block Move operations to give the
Initiator the opportunity to assert attention before
acknowledging the last message byte. For example, if the
initiator wishes to reject a message, is issues an Assert
SCSI ATN instruction before a Clear SCSI ACK
instruction.
Reserved
Start Address
This 32-bit field contains the memory address to fetch the
next instruction if the selection or reselection fails.
If relative or table relative addressing is used, this value
is a 24-bit signed offset relative to the current
SCRIPTS Pointer (DSP)
Instruction Type - Read/Write Instruction
The Read/Write instruction uses operator bits 26 through
24 in conjunction with the opcode bits to determine which
instruction is currently selected.
Opcode
The combinations of these bits determine if the
instruction is a Read/Write or an I/O instruction. Opcodes
000 through 100 are considered I/O instructions.
register, then stores the result back to the specified
register value.
SCSI First Byte
DMA
[31:30]
[29:27]
[31:0]
[2:0]
6-21
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