LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 22
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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1.4.5 Flexibility
1-8
The following features increase the flexibility of the LSI53C875:
General Description
Compiler-compatible with existing LSI53C7XX and LSI53C8XX
family SCRIPTS.
Direct connection to PCI, and SCSI SE and differential buses.
Development tools and sample SCSI SCRIPTS available.
Maskable and pollable interrupts.
Wide SCSI, A or P cable, and up to 16 devices are supported.
Three programmable SCSI timers: Select/Reselect, Handshake-to-
Handshake, and General Purpose. The time-out period is
programmable from 100 s to greater than 25.6 seconds.
SDMS software for complete PC-based operating system support.
Support for relative jumps.
SCSI Selected As ID bits for responding with multiple IDs.
High level programming interface (SCSI SCRIPTS).
Programs local memory and bus Flash memory.
Big/little endian support.
Selectable 88 or 536 byte DMA FIFO for backward compatibility.
Tailored SCSI sequences execute from main system RAM or internal
SCRIPTS RAM.
Flexible programming interface to tune I/O performance or to adapt
to unique SCSI devices.
Support for changes in the logical I/O interface definition.
Low level access to all registers and all SCSI bus signals.
Fetch, Master, and Memory Access control pins.
Separate SCSI and system clocks.
SCSI clock doubler bits enable Ultra SCSI transfer rates with a
40 MHz SCSI clock.
Selectable IRQ pin disable bit.
32 additional scratch pad registers.
Ability to route system clock to SCSI clock.
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