LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 304
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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Figure B.4
Note: MAD bus sense logic enabled for 512 Kbytes of slow memory (150 ns devices, additional time required for
B-4
LSI53C875
HCT139 @ 33 MHz). The HCT374s may be replaced with HCT377s.
512 Kbyte Interface with 150 ns Memory
MAS0/
MAS1/
MCE/
MAD[7:0]
GPIO4
MWE/
MOE/
Bus
External Memory Interface Diagram Examples
MAD[2:0] Bus
Optional - for Flash Memory only, not
required for EEPROMS.
+ 12 V
MAD0
MAD2
8
8
3
D7
CK
D0
D7
CK
D0
D2
CK
D0
HCT374
4.7 K
4.7 K
HCT374
HCT377
Control
V
PP
V
Q0
Q7
0E
Q0
Q7
SS
0E
Q0
Q2
0E
8
8
8
A17
A18
A[7:0]
A
B
GB
HCT139
V
PP
A[15:8]
D[7:0]
Y0
Y1
Y2
Y3
A16
OE
D0
D7
A0
A16
27C010-15/28F010-15 Sockets
CE
D0
OE
D7
A0
A16
CE
OE
D0
D7
A0
A16
CE
D0
D7
OE
A0
A16
CE
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