LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 57
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LSI53C875-160QFP
Manufacturer:
LSI
Quantity:
20 000
Company:
Part Number:
LSI53C875J
Manufacturer:
NS
Quantity:
4 490
Part Number:
LSI53C875J
Manufacturer:
LSILOGIC
Quantity:
20 000
- Current page: 57 of 314
- Download datasheet (3Mb)
2.5.13.6 Halting in an Orderly Fashion
2.5.13.7 Sample Interrupt Service Routine
As previously mentioned, DMA interrupts do not attempt to flush the
FIFOs before generating the interrupt. It is important to set either the
Clear DMA FIFO (CLF) and Clear SCSI FIFO (CSF) bits if a DMA
interrupt occurs and the DMA FIFO Empty (DFE) bit is not set. This is
because any future SCSI interrupts are not posted until the DMA FIFO
is cleared of data. These ‘locked out’ SCSI interrupts are posted as soon
as the DMA FIFO is empty.
When an interrupt occurs, the LSI53C875 attempts to halt in an orderly
fashion.
The following is a sample of an interrupt service routine for the
LSI53C875. It can be repeated during polling or should be called when
the IRQ/ pin is asserted during hardware interrupts.
PCI Cache Mode
If the interrupt occurs in the middle of an instruction fetch, the fetch
is completed, except in the case of a Bus Fault. Execution does not
begin, but the
instruction since it is updated when the current instruction is fetched.
If the DMA direction is a write to memory and a SCSI interrupt
occurs, the LSI53C875 attempts to flush the DMA FIFO to memory
before halting. Under any other circumstances only the current cycle
is completed before halting, so the DFE bit in DSTAT should be
checked to see if any data remains in the DMA FIFO.
SCSI SREQ/SACK handshakes that have begun are completed
before halting.
The LSI53C875 attempts to clean up any outstanding synchronous
offset before halting.
In the case of Transfer Control Instructions, once instruction
execution begins it continues to completion before halting.
If the instruction is a JUMP/CALL WHEN/IF <phase>, the
SCRIPTS Pointer (DSP)
halting.
All other instructions may halt before completion.
DMA SCRIPTS Pointer (DSP)
is updated to the transfer address before
points to the next
DMA
2-33
Related parts for LSI53C875
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
LR33000 Self-Embedding Processor
Manufacturer:
LSI [LSI Computer Systems]
Datasheet:
Part Number:
Description:
LSI for 16 CH Multiplexing
Manufacturer:
Mitsubishi
Datasheet:
Part Number:
Description:
DVD Recorder System Processor
Manufacturer:
LSI Logic
Datasheet:
Part Number:
Description:
DVD Recorder System Processor
Manufacturer:
LSI Logic
Datasheet:
Part Number:
Description:
Servo / Video Decoder and System Processor
Manufacturer:
LSI Logic
Datasheet:
Part Number:
Description:
Mpeg-2 Audio/video Decoder
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Satellite Decoder Technical Manual 5/97
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Satellite Receiver
Manufacturer:
LSI Logic Corporation
Datasheet: