LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 88
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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3-24
Register: 0x3E
Min_Gnt
Read Only
MG
Register: 0x3F
Max_Lat
Read Only
ML
PCI Functional Description
7
0
7
0
0
1
Min_Gnt
This register is used to specify the desired settings for
latency timer values. Min_Gnt is used to specify how long
a burst period the device needs. The value specified in
these registers is in units of 0.25 microseconds. The
LSI53C875 sets this register to 0x11.
Max_Lat
This register is used to specify the desired settings for
latency timer values. Max_Lat is used to specify how
often the device needs to gain access to the PCI bus.
The value specified in this register is in units of
0.25 microseconds. Values of zero indicate that the
device has no major requirements for the settings of
latency timers. The LSI53C875 sets this register to 0x40.
0
0
1
0
MG
ML
0
0
0
0
0
0
0
1
0
0
[7:0]
[7:0]
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