PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 2

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PC87307VUL

Manufacturer Part Number
PC87307VUL
Description
PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
Manufacturer
National Semiconductor
Datasheet
www.national.com
A special Plug and Play (PnP) module that includes:
— Flexible IRQs, DMAs and base addresses that meet
— Plug and Play ISA mode (with isolation mechanism
— Motherboard Plug and Play mode
A Floppy Disk Controller (FDC) that provides:
— A modifiable address that is referenced by a 16-bit
— Software compatibility with the PC8477, which con-
— 13 IRQ channel options
— Four 8-bit DMA channel options
— 16-byte FIFO
— Burst and non-burst modes
— A high-performance, internal, digital data separator
— Support for standard 5.25" and 3.5" floppy disk
— Automatic media sense support
— Perpendicular recording drive support
— Three-mode Floppy Disk Drive (FDD) support
— Full support for the IBM Tape Drive Register (TDR)
A Keyboard and mouse Controller (KBC) with:
— A modifiable address that is referenced by a 16-bit
— 13 IRQ options for the keyboard controller
— 13 IRQ options for the mouse controller
— An 8-bit microcontroller
— Software compatibility with the 8042AH and
— 2 KB of custom-designed program ROM
— 256 bytes of RAM for data
— Five programmable dedicated open drain I/O lines
— Asynchronous access to two data registers and one
— Support for both interrupt and polling
— 93 instructions
— An 8-bit timer/counter
— Support for binary and BCD arithmetic
— Operation at 8 MHz,12 MHz or 16 MHz (programma-
— Can be customized using the PC87323VUL, which
A Real-Time Clock (RTC) that has:
— A modifiable address that is referenced by a 16-bit
— 13 IRQ options, with programmable polarity
— DS1287, MC146818 and PC87911 compatibility
the Plug and Play requirements specified by Mi-
crosoft
Windows
– Wait for Key state)
programmable register
tains a superset of the floppy disk controller func-
tions in the DP8473, the NEC PD765A and the
N82077
that does not require any external filter components
drives
implementation of AT and PS/2 drive types
programmable register, reported as a fixed address
in resource data
PC87911 microcontrollers
for keyboard controller applications
status register during normal operation
ble option)
includes a RAM-based KBC, as a development plat-
form for keyboard controller code
programmable register
®
®
in their 1995 hardware design guide for
and Plug and Play ISA Revision 1.0A
Highlights
2
— 242 bytes of battery backed up CMOS RAM in two
— Selective lock mechanism for the RTC RAM
— Battery backed up century calendar in days, days of
— Battery backed-up time of day in seconds, minutes
— BCD or binary format for time keeping
— Three different maskable interrupt flags:
— Separate battery pin, 2.4 V operation that includes
— 2 A maximum power consumption during power
— Double-buffer time registers
An Advanced Power supply Control (APC) that controls
the main power supply to the system, using open-drain
output, as follows:
Power turned on when:
— The RTC reaches a pre-determined date and time.
— A high to low transition occurs on the RI input signals
— A ring pulse or pulse train is detected on the RING
— A SWITCH input signal indicates a Switch On event
Powered turned off when:
— A SWITCH input signal indicates a Switch Off event
— A Fail-safe event occurs (power-save mode detect-
— Software turns power off.
Two UARTs that provide:
— Software compatibility with the 16550A and the
— A modifiable address that is referenced by a 16-bit
— 13 IRQ channel options
— Shadow register support for write-only bits
— Four 8-bit DMA options for the UART with Infrared
An enhanced UART and Infrared (IR) interface on the
UART2 that supports:
— UART data rates up to 1.5 Mbaud
— IrDA 1.0 SIR
— ASK-IR option of SHARP-IR
— DASK-IR option of SHARP-IR
— Consumer-IR (TV-Remote) circuitry
— A Plug and Play compatible external transceiver
A bidirectional parallel port that includes:
— A modifiable address that is referenced by a 16-bit
banks
the week, months and years, with automatic leap-
year adjustment
and hours that allows a 12 or 24 hour format and ad-
justments for daylight savings time
an internal UL protection resistor
down
of the UARTs.
input signal.
ed but the system is hung up).
16450
programmable register
support (UART2)
programmable register
Periodic interrupts - At intervals from 122 msec
to 500 msec
Time-of-day alarm - At intervals from once per
second to once per day
Updated Ended Interrupt - Once per second
upon completion of update

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