PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 45

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PC87307VUL

Manufacturer Part Number
PC87307VUL
Description
PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
Manufacturer
National Semiconductor
Datasheet
Note:
3.3.3
The KBC clock frequency is selected by the SuperI/O KBC
Configuration Register at index F0h of logical device 0 to be
either 8, 12 or 16 MHz. 16 MHz is not available when the
clock source on pin X1 is 24 MHz. This clock is generated
from a 32.768 KHz crystal connected to pins X1C and X2C,
or from either a 24 MHz or a 48 MHz clock input at pin X1.
See “SuperI/O KBC Configuration Register, Index F0h” on
page 36, Figures 3-4 and 3-5. The clock source and fre-
quency may only be changed when the KBC is disabled.
For details regarding the configuration of each device, refer
to Tables 2-12 and 2-13 starting on page 30.
From KBC IRQ
KBC IRQ Feedback
Interrupt Enable
From Mouse IRQ
Mouse IRQ Feedback
Interrupt Enable
The EN FLAGS command (used for routing OBF and
IBF onto P24 and P25 in the 8042) causes unpredict-
able results and should not be issued.
KBC Clock
A15-0
A15-0
AEN
AEN
KBC CLK
MR
RD
MR
RD
Address
Decoder
Address
Decoder
Keyboard (and Mouse) Controller (KBC) (Logical Devices 0 and 1)
S1
Port 60
Read
Port 60
Read
FIGURE 3-3. Interrupt Request Logic
FIGURE 3-4. Instruction Timing
1 Instruction Cycle = 15 Clock Cycles
S2
S3
45
D
D
CLK
CLK
CLR
CLR
“1”
“1”
PR
PR
Q
Q
External
Clock
FIGURE 3-5. External Clock Connection
(1 = Latch)
(1 = Latch)
Interrupt
Interrupt
S4
Standard or
Open-Collector
TTL Driver
1
1
0
0
Type
Type
MUX
MUX
S5
(0 = Invert)
(0 = Invert)
Interrupt
Interrupt
Polarity
Polarity
PC87307/PC97307
0
1 MUX
0
1 MUX
X1
+V
S1
CC
Play Matrix
Play Matrix
Plug and
Plug and
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