PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 48
PC87307VUL
Manufacturer Part Number
PC87307VUL
Description
PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
Manufacturer
National Semiconductor
Datasheet
1.PC87307VUL.pdf
(218 pages)
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3.5.3
The STATUS register holds information regarding the sys-
tem interface status. Figure 3-9 shows the bit definition of
this register. This register is controlled by the KBC firmware
and hardware, and is read-only for the system.
Bit 0 - OBF, Output Buffer Full
Bit 1 - IBF, Input Buffer Full
Bit 2 - F0, General Purpose Flag
Bit 3 - F1, Command/Data Flag
Bits 7-4, General Purpose Flags
3.6 INSTRUCTION TIMING
The KBC clock is first divided by 3 to generate the state tim-
ing, then by 5 to generate the instruction timing. Thus each
instruction cycle consists of five states and 15 clock cycles.
Most keyboard controller instructions require only one in-
struction cycle, while some require two cycles. Refer to the
8042 or PC87323VUL instruction set for details.
0
7
A 1 indicates that data has been written into the DB-
BOUT register by the KBC. It is cleared by a system
read operation from DBBOUT.
When a write operation is performed by the host system,
this bit is set to 1, which may be set up to trigger the IBF
interrupt. Upon executing an IN A, DBB instruction, it is
cleared.
A general purpose flag that can be cleared or toggled by
the keyboard controller firmware.
This flag holds the state of address line A2 while a write
operation is performed by the host system. It distin-
guishes between commands and data from the host
system. In this device, a write with A2 = 1 (hence F1 =
1) is defined as a command, and A2 = 0 (hence F1 = 0)
is data.
These flags may be modified by KBC firmware.
6
0
FIGURE 3-9. KBC STATUS Register Bitmap
The KBC STATUS Register, Offset 64h,
Read Only
5
0
4
0
General Purpose
3
0
Flags
2
0
F1 Command or Data Flag
1
0
F0 General Purpose Flag
Keyboard (and Mouse) Controller (KBC) (Logical Devices 0 and 1)
0
0
IBF Input Buffer Full
Reset
OBF Output Buffer Full
KBC Status Register
Offset 64h
Read Only
48
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