74LVC163 Philips, 74LVC163 Datasheet - Page 4
![no-image](/images/no-image-200.jpg)
74LVC163
Manufacturer Part Number
74LVC163
Description
Presettable synchronous 4-bit binary counter; synchronous reset
Manufacturer
Philips
Datasheet
1.74LVC163.pdf
(12 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LVC16344APAG
Manufacturer:
PHILIPS
Quantity:
731
Company:
Part Number:
74LVC16373ADG-T
Manufacturer:
TI
Quantity:
72
Part Number:
74LVC16373ADG-T
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Part Number:
74LVC16373ADGG
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
74LVC16373ADGG-T
Manufacturer:
NXP
Quantity:
5 000
Company:
Part Number:
74LVC16373ADGGЈ¬118
Manufacturer:
NXP
Quantity:
6 000
Company:
Part Number:
74LVC16373APV
Manufacturer:
NXP
Quantity:
102
Part Number:
74LVC16374ADGG
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Part Number:
74LVC163DB
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74LVC163PW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Philips Semiconductors
FUNCTIONAL DIAGRAM
STATE DIAGRAM
1998 May 20
Presettable synchronous 4-bit binary counter;
synchronous reset
10
9
7
2 CP
1 MR
PE
CET
CEP
15
14
13
12
0
Q
14
11
3
D
1
0
0
PARALLEL LOAD
CIRCUITRY
COUNTER
BINARY
4
Q
13
D
1
1
10
2
5
Q
12
D
2
2
3
9
SF00664
6
Q
11
D
3
3
4
5
6
7
8
SY00068
TC 15
4
FUNCTION TABLE
NOTES:
*
H
h
L
l
q
X
TYPICAL TIMING SEQUENCE
Typical timing sequence: reset outputs to zero; preset to binary
twelve; count to thirteen, fourteen, fifteen, zero, one, and two;
inhibit
OPERATING
Reset (clear)
Parallel load
Parallel load
(do nothing)
CEP
CET
MODES
MR
CP
PE
D0
D1
D2
D3
Q0
Q1
Q2
Q3
TC
Count
=
=
=
=
=
=
=
=
Hold
RESET PRESET
The TC output is High when CET is High and the counter
is at Terminal Count (HHHH)
High voltage level
High voltage level one setup time prior to the Low-to-High
clock transition
Low voltage level
Low voltage level one setup time prior to the Low-to-High
clock transition
Lower case letters indicate the state of the referenced
output one setup time prior to the Low-to-High clock
transition
Don’t care
Low-to-High clock transition
MR
12
h
h
h
h
h
l
13
CP
X
X
14
CEP
X
X
X
X
h
INPUTS
l
15
COUNT
0
CET
X
X
X
h
X
l
1
PE
X
h
h
h
l
l
2
74LVC163
Product specification
Dn
X
h
X
X
X
l
INHIBIT
count
OUTPUTS
Qn
q
q
H
L
L
n
n
SY00069
TC
L
L
L
*
*
*